The present invention relates to a semiconductor device and to a technique which is effective when applied to a semiconductor device having a solid-state imaging element such as, e.g., a CMOS (Complementary Metal Oxide Semiconductor) image sensor.
For example, Patent Document 1 includes a description of a CMOS solid-state imaging device. Patent Document 1 discloses a technique in which a light reception portion is provided in a semiconductor substrate, an amplification transistor is provided in a semiconductor layer provided over the semiconductor substrate via an insulating layer, and the amplification transistor is formed of a p-channel transistor to improve the linearity of a signal read from the light reception portion.
For example, Patent Document 2 includes a description of a MOSFET using a SOI structure in which a semiconductor layer is provided over an insulator layer. Patent Document 2 discloses a technique which forms a CMOS source follower circuit by setting a source potential over the semiconductor layer in the MOSFET equal to a back-bias potential in a bias electrode in the insulator layer and thus avoiding a substrate bias effect.
For example, Patent Document 3 includes a description of a CMOS source follower circuit provided over a semiconductor substrate. Patent Document 3 discloses a technique which controls the respective threshold voltages of an N-channel transistor and a P-channel transistor in the CMOS source follower circuit using a back-bias voltage control circuit.